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Improvement of 48 nm TANOS NAND cell performance by introduction of a removable encapsulation liner

: Beug, M. Florian; Melde, Thomas; Paul, Jan; Bewersdorff-Sarlette, Ulrike; Czernohorsky, Malte; Beyer, Volkhard; Hoffmann, Raik; Seidel, Konrad; Löhr, Daniel-Andre; Bach, Lars; Knöfler, R.; Tilke, Armin T.


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE International Memory Workshop, IMW 2009. Proceedings : Monterey, California, USA, 10 - 14 May 2009
Piscataway, NJ: IEEE, 2009
ISBN: 978-1-4244-3762-7
ISBN: 978-1-4244-3761-0
International Memory Workshop (IMW) <2009, Monterey/Calif.>
Fraunhofer CNT ()

This paper presents charge trapping (CT) cells integrated with a sacrificial liner at the word line (WL) side wall which improves significantly the erase and retention characteristics, currently the main issues in CT memory devices.