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40 Gbit/s photoreceiver with DC-coupled output and operation without bias-T

: Mekonnen, G.G.; Bach, H.-G.; Schlaak, W.; Steingruber, K.; Seeger, A.; Passenberg, W.; Ebert, W.; Jacumeit, G.; Eckhardt, T.; Ziegler, R.; Beling, A.


IEEE Electron Devices Society; IEEE Lasers and Electro-Optics Society:
IPRM, 14th Indium Phosphide and Related Materials Conference. Conference proceedings : May 12 - 16, 2002, Stockholm, Sweden
Piscataway: IEEE Operations Center, 2002
ISBN: 0-7803-7320-0
International Conference on Indium Phosphide and Related Materials (IPRM) <14, 2002, Stockholm>
Fraunhofer HHI ()
forward error correction; integrated circuit packaging; integrated optoelectronics; optical receivers; travelling wave amplifiers; photoreceiver; dc-coupled output; photonic-based telecommunication systems; data traffic; bit rate; high-speed photoreceivers; optical communication systems; negative bias-configuration; external bias network; single-chip photoreceiver; cost effective packaging; efficiency; spot size converter; pintwa rx-oeics; monolithically integrated taper; 40 Gbit/s; 47 GHz; inp

The photonic-based telecommunication systems are continuously upgraded to a bit rate of 40 Gbit/s. The demand for faster transmission and the requirement of forward error correction (FEC) in data traffic makes it necessary to further extend the bit rate per channel. One of the key elements to fulfil these demands are high-speed photoreceivers in present and in future optical communication systems. Additional functionalities and cost effective packaging, obtained by a high degree of integration, as well as an increased efficiency and ease of use of the components are mandatory. The InP-based integrated photoreceiver concept with an additional integration of a spot size converter and a redesigned amplifier circuit was developed with these considerations in mind. This new generation of pinTWA Rx-OEICs comprise waveguide-integrated photodiodes with monolithically integrated taper and travelling wave amplifiers with a negative bias-configuration, avoiding an external bias network, and enables the cost effective packaging in a single-chip photoreceiver module with 47 GHz bandwidth.