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Evaluation of innovative nano-coated stencils in ultra-fine-pitch flip chip bumping processes

: Manessis, D.; Patzelt, R.; Ostmann, A.; Aschenbrenner, R.; Reichl, H.

International Microelectronics and Packaging Society -IMAPS-:
41st International Symposium on Microelectronics 2008 : November 2-6, 2008, Rhode Island Convention Center, Providence, Rhode Island, USA
Reston, Va.: IMAPS, 2008
ISBN: 0-930815-86-6
International Symposium on Microelectronics <41, 2008, Providence/RI>
Fraunhofer IZM ()

Stencil printing of solder paste as a cost-effective and reliable technology for wafer bumping keeps in good pace with the fast evolution of back-end packaging designs. Our wafer bumping research activities follow the same path as indicated by the current industrial road maps for further pitch reduction capability in Ultra Fine Pitch (UFP) area (<120µm for peripheral arrays).

Although solder paste stencil printing technology in world production facilities is currently being used up to 130µm for peripheral and 150µm for area arrays, our studies investigate even lower pitch limits up to 80µm pitch flip chip bumping. The proposed study brings into light new developments in laser-cut stainless steel stencils with the introduction of nano-coatings to the bottom stencil surface and on the wall surface of the stencil apertures. The nano-coating treatment follows after the laser-cutting process. Results show the great potential of nano-treated stencils to paste release from stencil apertures designed for common SMT printing applications as well as for high-end flip chip bumped wafers. The improvement of paste release properties for all paste types results in lowering the design aspect and area ratios for effective paste printing and thereby offering the opportunity to print pastes even from very fine apertures especially in the case of Ultra-fine-pitch (UFP) printing where very small pitches do not allow the design of larger apertures. In addition, the use of nano-coated stencils reduces significantly the interval of paste cleaning from the stencil apertures due again to better paste release. This in turn has great benefits to wafer bumping throughput and overall process cycle. In the proposed study, bumping results of a 6 inches wafer with peripheral pads at 80µm pitch will be shown. The results will be shown on a comparative basis of a laser-cut and a nano-coated stencil. Very fine apertures of 40µmx90µm have been designed and state-of-the-art 20µm thin stencils have been used. Paste printing at 80µm UFP has used a newly developed type 8 (2µm-8µm) lead-free solder paste. Bumping results at 80µm pitch will be compared from both stencils in terms of bump height, bump uniformity, yield, defect rate, stencil integrity and bumping process stability.