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Application of lock-in-thermography for 3D defect localisation in complex devices

 
: Schmidt, C.; Altmann, F.; Grosse, C.; Naumann, F.; Lindner, A.

:

Institute of Electrical and Electronics Engineers -IEEE-:
2nd Electronics Systemintegration Technology Conference, ESTC 2008. Proceedings. Vol.2 : 1st - 4th September 2008, Greenwich, London, UK
Piscataway, NJ: IEEE, 2008
ISBN: 978-1-4244-2813-7
ISBN: 978-1-4244-2814-4
ISBN: 1-4244-2813-0
S.1041-1044
Electronics Systemintegration Technology Conference (ESTC) <2, 2008, London>
Englisch
Konferenzbeitrag
Fraunhofer IWM ()
Lock-in-thermography; non-destructive localization

Abstract
This paper handles with the topic of non-destructive localization of electrical defects in fully packaged and complex devices using the application of Lock-in-Thermography (LIT). It will be shown that inner electrical defects like shorts and resistive opens can be found by thermal imaging of the device surface. The paper will explain the operational principle of the LIT and the resulting opportunity of 3-dimensional localization of inner defects by measuring the phase shift between the electrical excitation and the thermal response at the device surface using LIT. Furthermore, the essential influence of the Lock-in-frequency for optimization of spatial resolution and sensitivity will be discussed.

: http://publica.fraunhofer.de/dokumente/N-112864.html