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Direct write pattern placement accuracy for E-beam nanolithography

: Reimer, K.; Ehrlich, C.; Köhler, C.; Brünger, W.H.


Microelectronic engineering 23 (1994), No.1-4, pp.93-96
ISSN: 0167-9317
International Conference on Microcircuit Engineering (ME) <19, 1993, Maastricht>
Conference Paper
Fraunhofer ISIT ()
electron beam litography; errors; integrated circuit technology; nanaotechnology; VLSI

The pattern placement accuracy (PPA) is an important parameter in e-beam "direct write" for nanoelectronic applications. With a LEICA EBPG 4 HR, the influence of different mark/substrate combinations and of several writing parameters on the PPA was investigated, The obtainable "direct write" overlay accuracy was 45 nm ( mod mean mod +3 sigma ) for gold marks on a silicon wafer. Taking into account VLSI design rules, this value does not allow one to take advantage of the EBPG 4 HR's resolution of 30 nm. However, splitting up the total "direct write" overlay error into single contributions, e.g. reproducibility of mark detection, electron beam drift, alignment errors and temperature stability there is only a small margin for improvements. New methods in chip design, pattern alignment and chip processing seem to be necessary to manufacture electronic devices on the nanometer scale.