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Digitale Gatterschaltung mit herabgesetztem Querstrom

Digital gate circuit with reduced transverse current - has several drain-source paths of series-connected MOSFETs, transmitting output signal of one circuit gate stage.
 
: Eichholz, J.; Quenzer, H.J.; Staudt-Fischbach, P.

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Frontpage ()

DE 1997-19718369 A1: 19970502
DE 1998-19819867 A: 19980504
DE 19819867 C2: 20030424
H03K0019
H03K0019
German
Patent, Electronic Publication
Fraunhofer ISIT ()

Abstract
The output signal of the gate circuit gate stage is substantially a binary signal with sharp, at least steep flank/transition and can be tapped at a junction point of two series-connected MOSFETs with both its binary values. The threshold voltages from a P- and an N-channel MOSFET so overlap that the drain-source paths of the MOSFET, coupled at the junction point are not simultaneously low-ohmic - at ideal switching of the transistors. Preferably the MOSFETs have differently doped channels. Typically at least one transistor, near the low potential, is of the N-channel type. The sum of the threshold voltages may be more than 2V, and the overlap may be up to several volts. USE - For digital circuits. ADVANTAGE - Allows free selection of the threshold voltage of individual transistors.

: http://publica.fraunhofer.de/documents/PX-9894.html