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1990
Conference Paper
Titel
Concept of neural hardware for parallel image processing
Abstract
This paper presents a new approach to the distributed processing hardware for neural nets. Our goal is to develop a VLSI chip that can simulate different types of neurons and communicate with other chips within an array computer network. We will show that our concept is even suitable for image processing applications. To illustrate this, a video bus interface and an image processing array built of our neuro computer is presented.