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A compatible CMOS-JFET pulse density modulator for interpolative high-resolution A/D conversion

Parallelausgabe: Publications 1985. IMS-Duisburg
 
: Fiedler, H.-L.; Röttcher, U.; Zimmer, G.

IEEE journal of solid-state circuits 21 (1986), No.3, pp.446-452 : Abb.,Tab.,Lit.
ISSN: 0018-9200
European Solid State Circuits Conference <11, 1985>
English
Conference Paper
Fraunhofer IMS ()

Abstract
The analog part of a high-resolution A/D converter has been integrated in a compatible 3.5 micrometer CMOS-JFET technology. The circuit, which form a pulse density modulator (PDM), can be operated at sample rates up to 12 MHz and reaches a SNR of 84 dB over a baseband of 20 kHz. This corresponds to approximately 14 bit A/D resolution. (IMS)

: http://publica.fraunhofer.de/documents/PX-8245.html