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A compatible CMOS-JFET pulse density modulator for interpolative high-resolution A/D conversion

Parallelausgabe: Publications 1985. IMS-Duisburg
 
: Fiedler, H.-L.; Röttcher, U.; Zimmer, G.

ESSCIRC '85. 11th European Solid State Circuits Conference. Proceedings
1985
pp.89 ff : Abb.,Tab.,Lit.
European Solid State Circuits Conference <11, 1985>
English
Conference Paper
Fraunhofer IMS ()

Abstract
The analog part of a high-resolution A/D converter has been integrated in a compatible CMOS-JFET technology. The circuit, which forms a pulse-density modulator (PDM), can be operated at sample rates up to 12 MHz and reaches a peak SNR of 84 dB over a baseband of 20 kHz. This corresponds to approximately 14-bit A/D resolution. (IMS)

: http://publica.fraunhofer.de/documents/PX-8244.html