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A CMOS floating-point vector-arithmetic unit

 
: Timmermann, D.; Rix, B.; Hahn, H.; Hosticka, B.J.

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IEEE journal of solid-state circuits 29 (1994), No.5, pp.634-639
ISSN: 0018-9200
English
Journal Article
Fraunhofer IMS ()
algorithm; Algorithmus; arithmetic; Arithmetik; CORDIC; floating point; Gleitkomma

Abstract
This work describes a floating-point arithmetic unit based on the CORDIC algorithm. The unit computes a full set of high level arithmetic and elementary functions: multiplication, division, (co)sine, hyperbolic (co)sine, square root, natural logarithm, inverse (hyperbolic) tangent, vector norm, and phase. The chip has been integrated in 1.6 fm double-metal, n-well CMOS technology and achieves a normalized peak performance of 220 MFLOPS.

: http://publica.fraunhofer.de/documents/PX-7908.html