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  4. Circuit techniques for 10 and 20 Gb/s clock recovery using a fully balanced narrowband regenerative frequency divider with 0.3 mu m HEMTs
 
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1996
Conference Paper
Title

Circuit techniques for 10 and 20 Gb/s clock recovery using a fully balanced narrowband regenerative frequency divider with 0.3 mu m HEMTs

Other Title
Schaltungstechniken für 10 und 20 Gb/s Taktrückgewinnung mit einem voll-balancierten Schmalband-Regenerativ-Frequenzteiler und 0.3 mikro m HEMTs
Abstract
SDH/SONET optical networks have so far been standardized for data rates up to 10 Gb/s (9.95328 Gb/s) in the synchronous transfer module level STM-64/STS192. The next higher level may possibly be a rate of 40 Gb/s. taking account of the difficulties of manufacture of 40 Gb/s devices and ICs, several experimental transmission systems have been demonstrated at 20 Gb/s.
Author(s)
Wang, Z.-G.
Berroth, M.
Thiede, A.
Rieger-Motzer, M.
Hofmann, P.
Hülsmann, A.
Köhler, Klaus  
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
Raynor, B.
Schneider, J.
Briggmann, D.
Mainwork
IEEE International Solid-State Circuits Conference 1996. Digest of technical papers  
Conference
International Solid-State Circuits Conference (ISSCC) 1996  
Language
English
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
Keyword(s)
  • clock recovery

  • optic-fibre digital communication

  • optische Datenübertragung

  • phase shifter

  • Phasenschieber

  • Taktrückgewinnung

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