Abstract
Laser beam testing of integrated circuits is still largely an unexploited field. Optical beam induced currents (OBIC) effect generated by light absorption and the resulting electron hole pair creation yields useful information by supplying current changes. By means of the subsequent signal processing logic state, detection using the OBIC effect in CMOS circuits becomes possible by irradiating the drain/substrate junction with the focused laser spot. As an approach towards automated contactless testing the system developed by us consists of a laser scanning microscope (LSM) coupled with the CAD layout data base. Logic state detection and automated failure analysis in CMOS circuits can be done without the need of vacuum and a minimum of circuit environmant preparation. The coupling of the LSM and the CAD layout data base leads to automated node location ans shortens up the failure search because it enables the user to backtrace signal interconnections inside the circuit during the local test session.