Verfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur

The invention relates to a process for the production of a vertically integrated circuit structure. The process can be performed using CMOS-compatible standard semiconductor technologies and permits clear reduction in production throughput times compared with known processes, thus lowering production costs. In the process according to the invention, the individual component layers are processed separately from each other in different substrates and are then joined together. First through-holes are opened on the front of a finished top substrate, said through-holes penetrating all existing component layers. Then a handling substrate is applied and the top substrate is thinned from the rear up to the through-holes. A finished bottom substrate is then joined to the top substrate. After removing the handling substrate, the through-holes are extended through the remaining layers up to a metallization plane of the bottom substrate and the electrical contact is made between the top and bottom substrates.