Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Verfahren und Vorrichtung zur Reinigung oder Aktivierung von elektrischen Leiterbahnen und Platinenoberflaechen

Cleaning or activating conductive layer or substrate surface - using dielectrically hindered discharge, especially prior to soldering.
: Lang, J.E.; Neiger, M.

Frontpage ()

DE 1997-19717698 A: 19970426
DE 1997-19717698 A: 19970426
DE 19717698 A1: 19981029
Patent, Electronic Publication
Fraunhofer ISI ()

Surface cleaning or activation of an electrically conductive layer (or a conductor line or contact pad) on a substrate or of the adjacent substrate surface is carried out by placing the layer in a gas-filled discharge space (3) between two electrodes (1, 2), positioning a dielectric (4) between the layer and at least one electrode (2) and applying a voltage between the electrodes to create a dielectrically hindered discharge through the dielectric, resulting in micro-discharges which effect direct cleaning or activation of the layer or substrate surface. Preferably, the dielectric (4) is diamond, a high voltage resistant ceramic insulating material such as ceramic, glass or porcelain, an insulating plastic such as 'Teflon' (RTM), PVC, fluorocarbon or phenoplast, or a surface coated with such materials. Also claimed is an apparatus for effecting a dielectrically hindered discharge, especially for carrying out the above process. USE - For removing contaminants, such as condensates adhesi ve or polymerisation residues, carbon-containing substances, metal oxides and metal hydrides, from the circuit lines or pads of circuit boards or electronic circuits prior to contacting with solder pastes, solders and passivating agents. ADVANTAGE - The process can be integrated into the manufacturing process to reduce the risk of re-contamination, acts extremely uniformly on the layer or substrate surface so that little or no heating occurs, is non-polluting and inexpensive, improves the mechanical, electrical and corrosion properties of the layer, can be localised at the layer to minimise substrate attack and avoids the need for fluxes or wet activation baths during subsequent soldering.