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Simulation of mixed signal systems in standard VHDL

 
: Grätz, H.; Fischer, W.-J.

International Association for Mathematical and Computer Modelling; Tima-Cmp Laboratory; Integrated Systems Engineering; IntelliSense Corp.; Mentor Graphics Corp.; Microcosm Technologies Inc.; Motorola Inc., Phoenix/Ariz.; Technology Modeling Associates Inc.; IEEE Electron Devices Society; Ecole Polytechnique Federale de Lausanne -EPFL-:
International Conference on Modeling and Simulation of Microsystems, Semiconductors, Sensors and Actuators 1998. Book of abstracts
Santa Clara, Calif., 1998
International Conference on Modeling and Simulation of Microsystems, Semiconductors, Sensors and Actuators (MSM) <1, 1998, Santa Clara/Calif.>
English
Conference Paper
Fraunhofer IMS, Außenstelle Dresden ( IPMS) ()
Mixed-Signal-Simulation; Systemsimulation; VHDL

Abstract
Historically the analogue and digitel parts of a hardware design have been modelled and simulated in different environments and could not be combined in a single simulator. On the other hand, if a design contains both analog and digital parts simulating their interactions are most important to reliably verify the design. Therefore, we present a method for simulating analogue circuits and digital components in a VHDL simulator. For executing analogue simulations in a VHDL environment an analogue simulator has been developed. It permits to model linear and non-linear circuits using only standard VHDL language elements. This fact allows a similar conversion of this method to different VHDL environments. A netlist is used to model the analogue parts with elements from a model library. In order to interface analogue and digital parts A/D and D/A converter elements are be used. This allows signal feedbacks between both parts during the simulation.

: http://publica.fraunhofer.de/documents/PX-33706.html