PublicaHier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.
A 140 Mb/s CMOS crosspoint chip for switching networks with dynamic path-rearrangement
|Institute of Electrical and Electronics Engineers -IEEE-:|
IEEE Custom Integrated Circuits Conference 1989. Proceedings
Piscataway/N.Y., 1989 (Proceedings of the IEEE)
|Custom Integrated Circuits Conference (CICC) <11, 1989, San Diego/Calif.>|
| Conference Paper|
|Fraunhofer IMS ()|
The crosspoint-chip discussed in this contribution was designed for use in an experimental TV-distribution network. Such a network has to be non-blocking and therefore requires a considerable amount of hardware, which is typically proportional to the product of the number of programs and the number of subscribers. The special architecture, this chip was designed for, reduces this hardware by factor of two while introducing conditional blockings into the network, which can be resolved by path-rearrangement. This feature has to be realized within the crosspoint chips, therefore increasing their complexity, because synchronous signal-processing is required. On the other hand, the ability of synchronizing broadband signals can be used for the implementation of a self-test.