Publica

Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

11,6 Gbps 1 to 4 demultiplexer using double pulse doped Quantum Well GaAs/AlGaAs transistors.

11,6 Gbps 1 zu 4 Demultiplexer unter Verwendung von Doppel Puls dotierten GaAs/AlGaAs Transistoren

DOI: 10.1049/el:19910289

	Electronics Letters 27 (1991), No.5, pp.459-460 : Abb.,Tab. ISSN: 0013-5194

	English
	Journal Article
	Fraunhofer IAF ()
	demultiplexer; high speed; Hochgeschwindigkeit; low power

Abstract
An ultrahigh speed 4 bit demultiplexer circuit has been developed and fabricated using a recessed gate process for enhancement and depletion transistors with 0:3mym gate length. First results show a data rate of 11-6 Gbit/s and a power consumption of 165 mW at 0-85 V supply voltage, including four 50Omega buffers.

: http://publica.fraunhofer.de/documents/PX-2845.html