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10 Gbit/s bit-synchronizer with automatic retiming clock alignement using Quantum Well AlGaAs/GaAs/AlGaAs technology

10 Gbit/s bit Synchronisierer mit automatischer Justierung des Abtasttaktes - unter Verwendung von Quantentrog AlGaAs/GaAs/AlGaAs Technologie

Institute of Electrical and Electronics Engineers -IEEE-:
13th Annual GaAs IC Symposium 1991. Technical digest
New York/N.Y.: IEEE, 1991
ISBN: 0-7803-0196-X
ISBN: 0-7803-0197-8
ISBN: 0-7803-0198-6
pp.217-220 : Abb.,Lit.
GaAs IC Symposium <13, 1991, Monterey/Calif.>
Conference Paper
Fraunhofer IAF ()
Bit-Synchronisierer; bit-synchronizer; optoelectronic receiver; Optoelektronik-Empfänger; Quantentrog-Bauelement; Quantum Well device

A 10 Gbit/s bit-synchronizer circuit has been fabricated using an enhancement/depletion 0.3 Mym recessed-gate AlGaAs/GaAs/ AlGaAs quantum well FET process. The differential gain of the phase comparator circuit is measured to be 371 mV/rad. The phase margins for monotonous phase comparison are minus54 /plus21 degree relative to the "in bit cell center" position of the clock edge. The chip has a power dissipation of 160 mW at a supply of 1.90 Volts.