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  4. 10 Gbit/s bit-synchronizer with automatic retiming clock alignement using Quantum Well AlGaAs/GaAs/AlGaAs technology
 
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1991
Conference Paper
Title

10 Gbit/s bit-synchronizer with automatic retiming clock alignement using Quantum Well AlGaAs/GaAs/AlGaAs technology

Other Title
10 Gbit/s bit Synchronisierer mit automatischer Justierung des Abtasttaktes - unter Verwendung von Quantentrog AlGaAs/GaAs/AlGaAs Technologie
Abstract
A 10 Gbit/s bit-synchronizer circuit has been fabricated using an enhancement/depletion 0.3 Mym recessed-gate AlGaAs/GaAs/ AlGaAs quantum well FET process. The differential gain of the phase comparator circuit is measured to be 371 mV/rad. The phase margins for monotonous phase comparison are minus54 /plus21 degree relative to the "in bit cell center" position of the clock edge. The chip has a power dissipation of 160 mW at a supply of 1.90 Volts.
Author(s)
Nowotny, U.
Hülsmann, A.
Kaufel, G.
Raynor, B.
Schneider, J.
Köhler, Klaus  
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
Wennekers, P.
Mainwork
13th Annual GaAs IC Symposium 1991. Technical digest  
Conference
GaAs IC Symposium 1991  
Language
English
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
Keyword(s)
  • Bit-Synchronisierer

  • bit-synchronizer

  • optoelectronic receiver

  • Optoelektronik-Empfänger

  • Quantentrog-Bauelement

  • Quantum Well device

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