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  4. A 3.6 Gigasample/s 5 bit analog to digital converter using 0.3 mu m AlGaAs-HEMT technology
 
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1993
Conference Paper
Title

A 3.6 Gigasample/s 5 bit analog to digital converter using 0.3 mu m AlGaAs-HEMT technology

Abstract
A 0.3 mu m AlGaAs-HEMT technology was used to develop a high speed Analog to Digital Converter (ADC). The 5 bit converter based on a parallel architecture, operates up to a 3.6 GHz sampling rate. Excellent dynamic performance was achieved by an optimized comparator design and careful layout of the signal and clock lines. Each comparator is preceeded by a preamplifier to enhance its sensitivity and to minimize clock kickback. Using source follower buffers at the input, a very linear input capacitance was achieved. Thus the ADC's overall input capacitance is voltage independant.
Author(s)
Oehler, F.
Sauerer, J.
Hagelauer, R.
Seitzer, D.
Nowotny, U.
Raynor, B.
Schneider, J.
Mainwork
15th Annual GaAs IC Symposium 1993. Technical Digest  
Conference
GaAs IC Symposium 1993  
DOI
10.1109/GAAS.1993.394478
Language
English
IIS-A  
Keyword(s)
  • comparator

  • flash ADC

  • Gallium Arsenid

  • gallium arsenide

  • HEMT

  • Komparator

  • Parallelumsetzer

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