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Integration of flip chip assembly in the SMT process: manufacturing and productivity issues



Uzsoy, R. ; IEEE Components, Packaging, and Manufacturing Technology Society; Semiconductor Equipment and Materials International -SEMI-, San Jose/Calif.:
Twenty Third IEEE/CPMT International Electronics Manufacturing Technology Symposium 1998
Piscataway, NJ: IEEE, 1998
ISBN: 0-7803-4523-1
ISBN: 0-7803-4524-X
ISBN: 0-7803-4525-8
International Electronics Manufacturing Technology Symposium (IEMT) <23, 1998, Austin/Tex.>
Conference Paper
Fraunhofer IZM ()
adhesives; chip scale packaging; concurrent engineering; fine-pitch technology; flip-chip devices; microassembling; reflow soldering; surface mount technology; temperature control; temperature distribution

Increasing interest in cost effective flip chip technologies leads to the development of various flexible methods for the deposition of solders and adhesives for use on chip or substrate. In this paper, the elements and basic process steps required for the development of a cost effective and flexible flip chip technology are described in detail. The deposition methods are focused on processes for stencil printing of solder paste on wafers and substrates. To achieve reproducible and homogeneous solder deposits, the process techniques for fine pitch printing require an improvement of the physical properties of the solder paste, of the stencil materials and stencil processing technologies, and of the printing equipment. Using solder pastes with very small particle sizes, a N2 atmosphere and a well controlled reflow furnace temperature profile is required. Apart from the technological aspects, the key point for the introduction of flip chip technology in a wide field of applications is the production equipment. The Fraunhofer Institute together with several industrial partners has set up a demonstration center for the assembly of flip chips (FC) and chip size packages (CSP). It is important to note that flip chip and CSPs can be used in conjunction with standard surface mount technology (SMT) devices. The development of these processes was performed by simultaneous engineering. In this paper, the experimental works are focused on the low cost bumping and assembly of flip chips and CSPs together with SMDs on different substrates.