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High performance cooling technology for Multi Chip Modules (MCM-D) with planar embedded dice


International Society for Hybrid Microelectronics -ISHM-:
11th European Microelectronics Conference 1997. Proceedings
S.l.: ISHM, 1997
European Microelectronics Conference <11, 1997, Venice>
Conference Paper
Fraunhofer IZM ()
assembling; buried layers; heat sink; integrated circuit packaging; integrated circuit reliability; multichip module; thermal analysis; thermal conductivity; thermal expansion; thermal management; thermal resistance

Multichip modules (MCMs) offer significant reduction in both interconnection signal delay and microelectronics packaging volume. However, this integration results in higher heat flux densities in the package. Mainly for high end applications (supercomputers, mainframes and workstations), considerable effort has been made during recent years to develop cooling concepts with very low thermal resistance. This paper describes a packaging technology for high power MCMs. The work covers three areas: the fabrication of a multichip module which provides access to the die backside for heat removal, the development of high performance microchannel heat sinks with matched CTE, and a low thermal resistivity assembling technology. The MCM is fabricated by means of planar embedding technology. By planarizing the module backside, a low thermal resistance between heat sink and dice can be accomplished simultaneously for all embedded components. This technology offers the same high interconnection density and high speed performance benefits of flip chip and provides high reliability and very small overall package size. On the other hand, the embedding technology promises to eliminate crucial problems associated with backside cooling of flip chip devices. A 2"*2" thermotest module, capable of power dissipation of several hundred watts, was fabricated. Thermal resistance values below 0.5 Kcm2/W at 50 W/cm2 chip flux have been achieved.