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Herstellungsverfahren fuer mikroelektronische Systeme zur Verhinderung von Produktpiraterie und Produktmanipulation, durch das Verfahren hergestelltes Halbleiter-Bauelement und Verwendung des Halbleiter-Bauelements in einer Chipkarte

Semiconductor component is produced with high circuit complexity to hinder piracy and manipulation.
 
: Ramm, P.

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Frontpage ()

DE 1997-19746642 A: 19971022
DE 1997-19746642 A: 19971022
DE 19746642 C2: 20020718
H01L0021
H01L0021
German
Patent, Electronic Publication
Fraunhofer IZM ()

Abstract
NOVELTY - A semiconductor component is produced by forming conductive vias through the component layers into the substrate (1), forming the contact (0c) between the component and the vias, bonding the substrate (1) to a second substrate (6), thinning the first substrate (1) until the vias are exposed and then producing a conductive structural element (9) on the first substrate free surface and in electrical contact with the vias. DETAILED DESCRIPTION - Production of a semiconductor component having one or more conductive structural elements comprises (a) applying and structuring component layers (3, 4) on a substrate (1); (b) forming conductive vias extending through all the component layers and down into the substrate (1); (c) effecting a functional electrical contact (0c) between the component and the conductive material in the vias; (d) bonding the substrate (1) to a second substrate (6); (e) thinning the first substrate (1) until the vias are exposed; (f) producing the or one of th e conductive structural elements (9) on the free surface of the first substrate such that the element (9) is in electrical contact with the conductive material in the vias; and (g) finishing the component. INDEPENDENT CLAIMS are also included for (i) a semiconductor component produced by the above process; and (ii) a semiconductor component produced by the above process and which is protected against the environment preferably by applying a protective layer prior to step (f). USE - The semiconductor component is used in a chip card (claimed). ADVANTAGE - The process employs CMOS compatible standard semiconductor technology, does not require any expensive alignment operations, allows high integration density to be combined with increased circuit complexity for hindering reverse engineering modification and the reading and/or manipulation of information stored in the component and can provide protection of the component against the environment.

: http://publica.fraunhofer.de/documents/PX-16972.html