Gigasample/second ADCs implemented on GaAs technologies

GaAs Analog-to-Digital Converters (ADCs) published up to now are flash or parallel type converters. The maximum resolution that can be achieved with this architecture is limited to about 5 bit. To enhance the dynamic accuracy at high input frequencies, a track-and-hold circuitry (T&H) must be placed at the input of the ADC. The development of an GaAs 5 bit 1 gigasample/second (GS/s) with on-chip T&H will be presented. The design is based on a commerical 1 µm GaAs E/D MESFET process. A complete DC and AC characterization using a histogram test, Fast Fourier Transform test (FFT-test), sine wave curve-fitting test and beat frequency test up to 1.3 GHz were performed. By using the T&H in front of the parallel ADC, 4.4 effective numbers of bits (ENOBs) are achieved at 1 GS/s full Nyquist input signal compared to 3.7 ENOBs without T&H. To achieve higher resolution, key components for an 8 bit/1 GSps ADC system were developed and characterized. The components are implemented in an 0.5 mu m Ga As SAGFET technology. On-chip E-beam measurements on the 4-bit parallel ADC were taken to investigate the origin of the aperture uncertainty. The clock distribution of the comparators showed differences of 20 psec between the comparators. Measurements of the T&H showed a droop of 3 mV/µs, a slew rate of 3 kV/µs and a settling time of 220 psec. Its accuracy corresponds to 9.5 bit at 1 GHz clock rate with 100 MHz input frequency. The 4-bit quantizer operates up to 1.5 GSps. At 800 MS/s, 3.8 ENOBs were achieved with input frequencies up to 200 MHz. The latest developments are based on a GaAs/AlGaAs 0.3 mu m HEMT technology. Components and results will be shown at the conference.