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Experimental verification of three-dimensional simulations of LTO layer deposition using geometries prepared with anisotropic wet-etching of silicon with KOH

 
: Bär, E.; Lorenz, J.; Ryssel, H.

8th Workshop on Dielectrics in Microelectronics 1996. Abstract Book
Venedig, 1996
Workshop on Dielectrics in Microelectronics <8, 1996, Venedig>
English
Conference Paper
Fraunhofer IIS B ( IISB) ()

: http://publica.fraunhofer.de/documents/PX-13503.html