: Klöser, J.; Kutzner, K.; Jung, E.; Heinricht, K.; Lauter, L.; Töpper, M.

Abstract
The Fraunhofer Institute (FhG/IZM-Berlin) together with several industrial partners has set up a demonstration center for the assembly of flip chips (FC) and chip size packages (CSP). It consists of a complete production line, and additional equipment for quality control and process development. The central interest is the implementation of cost effective, high reliability and environmentally friendly processes. To achieve these goals, upscaling existing flip chip technologies from laboratory examples to industrial production is necessary. At the same time, the technologies must be optimized to guarantee a high quality standard and good yield in high volume production. In order to demonstrate the high performance of these cost effective flip chip technologies, the process flows of different flip chip assembly techniques using solder are compared and described in detail. It is important to note that flip chips and CSPs can be used in conjunction with standard surface mount technology (SMT) devices. The development of these processes was performed by simultaneous engineering. Finally, the yield and costs are estimated and the reliability results of a selected flip chip process are presented.