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Electrical and structural properties of ultrathin SiO2 gate dielectrics prepared under various conditions

 

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Journal of the Electrochemical Society 139 (1991), No.5, pp.1420-1423
ISSN: 0013-4651
International Symposium on ULSI Science and Technology <3, 1991, Washington/D.C.>
English
Conference Paper
Fraunhofer ISIT ()

Abstract
We have fabricated ultrathin SiO sub 2 layers between 5 and 10 nm. Conventional thermal and rapid thermal oxide forming processes were applied as well as a low temperature chemical vapor deposition (CVD) process. With these dielectrics, single layers have been produced for structural investigations by infrared (IR) absorbance spectroscopy. The IR-spectra of the thermal oxides and the postannealed CVD-oxide revealed nearly the same vibrational properties. MOS devices such as capacitors and field effect transistors (FETs) have been fabricated with these dielectrics. Breakdown measurements revealed a reduced high field breakdown with a broadened distribution for CVD layers as compared to the results obtained for thermal oxides. This effect was reduced with decreasing thickness. From transfer characteristics and charge pumping measurements on FETs, no considerable difference in the number of fixed oxide charge and interface trapped charge density was observed for all oxides. The device pro perties appear to be more strongly effected by substrate dopant concentrations and the oxide thickness than by the intrinsic properties of the oxide.

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