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Performance optimization of semiconductor manufacturing equipment by the application of discrete event simulation

 

American Society of Mechanical Engineers -ASME-, Design Engineering Division; American Society of Mechanical Engineers -ASME-, Computers and Information in Engineering Division -CIE-:
DETC 2008, Proceedings of the ASME International Design Engineering Technical Conferences and Computers and Information in Engineering Conference, 2008. Vol.3, Pts A and B : Presented at 2008 ASME International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. August 3-6, 2008, New York City, New York USA
New York, NY: ASME, 2009
ISBN: 9780791843277
ISBN: 0791843270
pp.505-513
International Design Engineering Technical Conferences (IDETC) <2008, New York/N.Y.>
Computers and Information in Engineering Conference (CIE) <28, 2008, New York/NY.>
English
Conference Paper
Fraunhofer IISB ()

Abstract
Semiconductor wafer fabrication facilities (wafer fabs) are amongst the most complex production facilities. State-of-the-art wafer fabs comprise a large product variety, hundreds of processing steps per product, almost hundreds of machines of different types, and automated transportation systems combined with reentrant flows throughout the fab. In addition to the high complexity, wafer fabs require very high capital investment and an undisturbed operation. Semiconductor manufacturers are facing fierce competition as more global capacity is being added. Through this intense competition, semiconductor manufacturers have to improve their processes from a technological as well as from a logistical point of view in order to be successful within the global market. The logistics not only involves fab wide optimization strategies but also the individual equipment performance, for example cycle time and throughput, has to be considered. In this paper, the need for performance optimization of semiconductor manufacturing equipment is identified and the capability of discrete event simulation for such optimizations is being elaborated. Characteristics of different types of simulation models are described and the simulation model selection is explained. For case studies, several simulation models of different semiconductor manufacturing equipment have been developed. Using five examples, different optimization strategies, dependent on the application of the semiconductor manufacturing equipment, have been investigated by discrete event simulation. The paper shows the influence of the integration of metrology into deposition equipment, the impact of different batch sizes for oxidation processes, and the optimized dimensioning of photolithography equipment. Furthermore, the throughput and cycle time of different deposition equipment are optimized by the evaluation of various improvement strategies. All investigations have been performed with real data extracted from already utilized equipment or at least with data from the equipment suppliers of prototype equipment.

: http://publica.fraunhofer.de/documents/N-93051.html