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2008
Conference Paper
Titel
Simulation strategy of the analog front end for UHF passive RFID transponders
Abstract
The analog front end is one of the key elements in passive URF RFID transponders, accounting for such diverse operations as RF-DC conversion, voltage regulation, modulation und demodulation of the incident RF wave, and voltage limiting, among others. During the design process it is therefore necessary to accurately simulate the power up process and such functions as demodulation and backscatter modulation. However, since the input impedance of the chip varies with different operating conditions, the test bench set up poses a complex task. In addition, the antenna connected to the front end plays a key role and must be adequately modeled. This paper focuses on the simulation strategy of the analog front end for an RFID transponder fabricated in standard CMOS technology working in the UHF/SUHF range. We show how the input impedance and input power of the analog front end in its active and idle states can be precisely determined through simulation.