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Compact modelling of process related effects on electrical behaviour of CMOS transistors

Simulation mit Hilfe von Kompaktmodellen prozessierungsbedingter Einflüsse auf das elektrische Verhalten von CMOS-Transistoren
 
: Burenkov, A.; Zhou, X.

Brebbia, C.A. ; Wessex Institute of Technology, Southampton:
Software for Electrical Engineering Analysis and Design V
Southampton: WIT Press, 2001 (Software studies 3)
ISBN: 1-85312-866-X
pp.47-57
International Conference on Software for Electrical Engineering Analysis and Design (ELECTROSOFT) <5, 2001, Myrina, Lemnos>
English
Conference Paper
Fraunhofer IIS B ( IISB) ()
CMOS; simulation; compact model; process simulation; device simulation; SPICE simulation

Abstract
To account for the process related effects on the electrical behaviour of CMOS transitors, the numerical coefficients of the SPICE models were considered as variables dependent on processing conditions. For each relevant SPICE model coefficient, a second order polynomial model as a function of processing parameters was built. Such polynomial models provide a set of values of the SPICE model coefficients for each process variant. In this way an analytical description of the electrical behaviour of the transistors in dependence of processing parameters such as diffusion/oxidation times, implantation doses, etc. becomes possible. Such kind of modelling of process related effects needs much less computer time than a purely numerical simulation. Comparisons between the numerical and compact simulations showed that the polynomial models for the SPICE model coefficients satisfactorily describe the impact of process related parameters on the electrical behaviour of CMOS transistors, allowing a fast optimisation of the processing conditions.

: http://publica.fraunhofer.de/documents/N-9159.html