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Combining DIC techniques and finite element analysis for reliability assessment on micro and nano scale

 
: Vogel, D.; Dudek, R.; Keller, J.; Michel, B.

Iyer, M.K. ; Institute of Electrical and Electronics Engineers -IEEE-, Singapore Section, Reliability CPMT EDS Chapter; Components, Packaging and Manufacturing Technology Society -CPMT-; International Microelectronics and Packaging Society -IMAPS-:
5th Electronics Packaging Technology Conference, EPTC 2003. Proceedings : 10 - 12 December 2003, Pan Pacific Hotel, Singapore
Piscataway, NJ: IEEE, 2003
ISBN: 0-7803-8205-6
ISBN: 0-7803-8206-4
pp.450-455
Electronics Packaging Technology Conference (EPTC) <5, 2003, Singapore>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Recent development of new electronics and microsystem devices, including 3D integration, ultra thin chips, polymer electronics, high temperature electronics and MEMS/NEMS packaging, call for thermo-mechanical material and component characterization for reliability assessment on micro and even on nano scale. Both Finite Element Analysis (FEA) and deformation measurement are increasingly insufficient tools for that purpose as long as they are utilized as stand alone methods. The paper presents conceptional issues how to combine these two tools to make them a more powerful hybrid method. The applied by the authors digital image correlation method (DIC) for deformation measurement on micro and nano scale is briefly introduced. Emphasis is made on measurements based on AFM scans. Subsequently, application examples are referred to, e.g. for microcrack evaluation by combined DIC/FEA analysis as well as for the study of low cycle fatigue behavior of solder balls on BGA's.

: http://publica.fraunhofer.de/documents/N-67177.html