Fraunhofer-Gesellschaft

Publica

Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

The opportunities of integration technologies for active and passive components

 
: Ostmann, A.; Hoene, E.; Marczok, C.

Verband Deutscher Elektrotechniker e.V. -VDE-, Berlin:
CIPS 2020, 11th International Conference on Integrated Power Electronics Systems. Proceedings : March, 24 - 26, 2020, Berlin, Germany; CD-ROM
Berlin: VDE-Verlag, 2020 (ETG-Fachbericht 161)
ISBN: 978-3-8007-5225-6
ISBN: 978-3-8007-5226-3
ISBN: 3-8007-5225-5
pp.120-125
International Conference on Integrated Power Electronics Systems (CIPS) <11, 2020, Berlin>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Emerging applications and markets from Internet of Things to electrical vehicles need power converters with small footprint, low thermal losses and capability for integration into various environments. The expected big market for converters in the arising digital world asks for decreasing cost and more efficient manufacturing processes. New integration technologies allow realization of Power System-in-Packages and power modules with outstanding electrical and thermal performance. These integration technologies comprise embedding of semiconductors in printed circuit board structures as well as the location of passive components in power packages and modules. They enable the realization of flat devices with small footprint, which allows a cost-efficient manufacturing of many parts in parallel on large production formats. Power packages and System-in-Packages are in series production for years already. Automotive 48 V power modules have been announced, while high voltage m odules are still being evaluated. This paper discusses the benefits of integration technologies and explains different manufacturing processes. A combination of different integration technologies, embedded semiconductors and passives in the module, will be demonstrated by a direct water cooled device for 850 V and 100 A. It contains four prepacked SiC MOSFETs in a half bridge configuration. A primary DC link capacitor and damping resistor directly on top lead to a DC link inductance of less than 2 nH.

: http://publica.fraunhofer.de/documents/N-639602.html