Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Novel back-end-of-line compatible method for integration of inductances with magnetic core on silicon

: Paesler, M.; Lisec, T.; Kapels, H.

Verband Deutscher Elektrotechniker e.V. -VDE-, Berlin:
CIPS 2020, 11th International Conference on Integrated Power Electronics Systems. Proceedings : March, 24 - 26, 2020, Berlin, Germany; CD-ROM
Berlin: VDE-Verlag, 2020 (ETG-Fachbericht 161)
ISBN: 978-3-8007-5225-6
ISBN: 978-3-8007-5226-3
ISBN: 3-8007-5225-5
International Conference on Integrated Power Electronics Systems (CIPS) <11, 2020, Berlin>
Conference Paper
Fraunhofer ISIT ()

In high frequency applications like power supplies, the integration of active and passive components on a single chip is necessary to increase the power density. A novel approach for the integration of micro-inductances with a magnetic core on silicon substrates is presented. This paper shows development, processing and investigation of different samples, having a magnetic core of 3.4 mm x 1 mm x 0.6 mm in size. At 20 MHz inductances of 150 nH are reached, whereas the resistance is about 0.66 ?. The fabrication technique is based on the agglomeration of micron-sized magnetic powder by atomic layer deposition (ALD). The process is fully back-end-of-line (BEOL) compatible and offers a wide range of magnetic materials, which can be integrated on the substrate in any desired geometry of the core. This enables a lot of possibilities for the integration and design of inductors.