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  4. Design Meets EDA: Gaps and Countermeasures in Analog/Mixed-Signal IC Design
 
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2021
Conference Paper
Title

Design Meets EDA: Gaps and Countermeasures in Analog/Mixed-Signal IC Design

Abstract
Along the path from specification to silicon, the design of analog/mixed-signal chips comprises a variety of challenges. They are of technological, methodological, organizational, communicational, and business nature. Additionally, large gaps are to be managed among the individual challenges. Still up to now, approaches such as the "four eye principle" are used even in industrial practice in order to handle them. However, steadily increasing system complexity makes this an end-of-range model. Instead, EDA support gets more and more relevant in order to tackle both problem-specific and overarching design challenges. Based on the well-known V-model, the tutorial will discuss the current design approach and discusses systematic alternatives comprising EDA, tools, tool interfaces, and usability aspects. With this, the design challenges can be tackled in order to stick with the market needs and tight design schedules.
Author(s)
Prautsch, Benjamin  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Wittmann, Reimund
IMST GmbH Kamp-Lintfort
Schenkel, Frank
MunEDA GmbH Unterhaching
Koelsch, Johannes
TU Kaiserslautern
Grimm, Christoph
TU Kaiserslautern
Strube, Gunter
Blu Business Development Gröbenzell
Mainwork
SMACD / PRIME 2021, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics  
Project(s)
AnastASICA
Funder
Bundesministerium für Bildung und Forschung BMBF (Deutschland)  
Conference
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) 2021  
Conference on PhD Research in Microelectronics and Electronics (PRIME) 2021  
DOI
10.24406/publica-fhg-411887
File(s)
N-638993.pdf (5.53 MB)
Rights
Under Copyright
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • IntelligentIP

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