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Design and implementation of an FPGA based high-speed data buffer for optical interconnects

 
: Voss, S.-H.; Talmi, M.; Saniter, J.

:

Institute of Electrical and Electronics Engineers -IEEE-:
2006 25th International Conference on Microelectronics. Vol. 2 : Serbia and Montenegro, 14 - 17 May 2006
Piscataway, NJ: IEEE, 2006
ISBN: 1-424-40116-X
pp.634-637
International Conference on Microelectronics (MIEL) <25, 2006, Belgrade>
English
Conference Paper
Fraunhofer HHI ()
buffer circuit; field programmable gate arrays; high-speed integrated circuits; integrated circuit design; optical interconnections; printed circuit design

Abstract
This paper describes the design and implementation of an innovative high- speed data buffer system for optical interconnects based on electrically reprogrammable FPGAs. It is characterized by high transfer rates and the dense integration of electrical and optical components on the basis of a printed circuit board (PCB). The high data rates and the highly parallelized system operation require a specific architecture and careful signal integrity design for proper functionality.

: http://publica.fraunhofer.de/documents/N-60595.html