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Data Converter Interleaving: Current Trends and Future Perspectives

: Schmidt, C.; Yamazaki, H.; Raybon, G.; Schvan, P.; Pincemin, E.; Yoo, S.J.B.; Blumenthal, D.J.; Mizuno, T.; Elschner, R.


IEEE Communications Magazine 58 (2020), No.5, pp.19-25
ISSN: 0163-6804
ISSN: 1558-1896
Journal Article
Fraunhofer HHI ()

Future generations of optical networks will require optical interfaces that operate beyond 1 Tb/s to keep up with the exploding worldwide Internet data capacity. The data converters, digital- to-analog converter (DAC) and analog-to-digital converter (ADC), significantly define the signal bandwidth that can be transmitted or received with an electro-optic transceiver. The foreseen improvements of complementary metal oxide semiconductor (CMOS) data converters in upcoming CMOS technology nodes do not scale to the expected interface data rates for future communications systems. To address this bandwidth requirement, parallel data converter architectures (i.e., interleaved data converters) are an intriguing solution to enable performance beyond the limits imposed by continuing traditional CMOS approaches. In this article, we discuss the performance requirements for future data converters and provide an overview of the projected evolution of fiber optic networks and the limits imposed by CMOS-only data converters. Interleaved data converter architectures, in both the electrical and optical domains, are described and discussed. Finally, an outlook is given on the future development of next generation DAC and ADC architectures. This article is based on the presentations and discussions in the workshop "Super DACs and ADCs -- To Interleave or Not to Interleave" at the Optical Networking and Communication Conference 2019.