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Implementation of a multiview passive-stereo-imaging system with SoC technology

: Fütterer, R.; Schellhorn, M.; Notni, G.

Fulltext ()

Rosenberger, M. ; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.:
Photonics and Education in Measurement Science 2019 : 17-19 September 2019, Jena, Germany
Bellingham, WA: SPIE, 2019 (Proceedings of SPIE 11144)
ISBN: 978-1-5106-2981-3
ISBN: 978-1-5106-2982-0
Paper 111440Q, 5 pp.
Conference "Photonics and Education in Measurement Science" <2019, Jena>
Conference Paper, Electronic Publication
Fraunhofer IOF ()

Passive-stereo-imaging as a part of three-dimensional image processing can be applied for many use cases where a depth information is necessary. This is often the case when classical two dimensional image processing get to its borders. Passive-stereo needs at minimum two images of the same object of interest. An initial one-time system calibration is absolutely essential. The usage of more than two sensors offer more system stability and reduce hidden image elements. A variant of semi-global-matching algorithm is used to find the matching points in the image pair and is implemented in the FPGA. The lateral shift of two matching points is called disparity. All disparity values together result in a disparity image which is the basis for a point cloud. By using embedded technologies, a compact and portable acquisition system could be realized. Programmable system-on-chip (PSoC) combining FPGA and ARM computing power in one chip design. This technology is an ideal solution to so acquire the images from the image sensor and calculate the disparity images.