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  4. FPGA-accelerated Phase Rectification for a Stereo-based Phase Measuring Profilometry System
 
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2018
Conference Paper
Title

FPGA-accelerated Phase Rectification for a Stereo-based Phase Measuring Profilometry System

Abstract
This paper proposes a FPGA-accelerated lens undistortion and rectification algorithm for a stereo-based phase measuring profilometry system. After a brief system overview we go into detail on the proposed hardware architecture for the stereo rectification block. The hardware architecture is based on a Xilinx Zynq-7020 SoC and uses compressed rectification maps to reduce the memory load. As a result, it is able to rectify a stereo setup with 435 mm baseline and converged optical axis of 32° between the cameras. The cameras are configured with 2 Mpix @ 60 fps and rectification can be applied "on the fly" during image grabbing.
Author(s)
Junger, C.
Heß, A.
Rosenberger, M.
Notni, G.
Mainwork
XXII World Congress of the International Measurement Confederation, IMEKO 2018  
Conference
International Measurement Confederation (IMEKO World Congress) 2018  
Open Access
DOI
10.1088/1742-6596/1065/3/032017
Additional full text version
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Fraunhofer-Institut für Angewandte Optik und Feinmechanik IOF  
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