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3D Integration: Status, Challenges and Requirements

: Wolf, M. Jürgen; Lang, Klaus-Dieter

Surface Mount Technology Association -SMTA-:
Pan Pacific Microelectronics Symposium, PAN PAC 2015 : Kauai, Hawaii, USA, 2 - 5 February 2015
Red Hook, NY: Curran, 2015
ISBN: 978-1-63439-931-9
Pan Pacific Microelectronics Symposium <20, 2015, Kauai/Hawaii>
Conference Paper
Fraunhofer IZM ()

Heterogeneous integration of different devices by using 3D architectures allows the realization of applications especially optimized for SiP in a high efficient and cost effective way. Basic elements for 3D integration are Through Silicon Vias (TSVs) or other vertical interconnect tructures e.g. TMVs. Interposer architectures are very attractive to deal with system performance improve-ment and to achieve cost effective packaging solutions.