Publica
Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten. Where is the Sweet Spot for Panel Level Packaging?
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Braun, T.; Becker, K.F.; Hölck, O.; Voges, S.; Wöhrmann, M.; Böttcher, L.; Töpper, M.; Stobbe, L.; Aschenbrenner, R.; Schneider-Ramelow, M.; Lang, K.D. | 6th International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2019. Proceedings : 21-25 May 2019, Kanazawa, Ishikawa, Japan
Piscataway, NJ: IEEE, 2019
ISBN: 978-4-904743-07-2
ISBN: 978-1-72810-387-7
pp.9 |
| International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D) <6, 2019, Kanazawa> |
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| English |
| Conference Paper |
| Fraunhofer IZM () |
Abstract
Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics. Besides technology developments towards heterogeneous integration including multiple die packaging, passive component integration in package and redistribution layer or package-on-package approaches also larger rectangular substrates formats are targeted.