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Flip chip bumping technology - Status and update

: Wolf, M.J.; Engelmann, G.; Dietrich, L.; Reichl, H.


Große-Knetter, J.:
PIXEL 2005, Proceedings of the International Workshop on Semiconductor Pixel Detectors for Particles and Imaging : Bonn, Germany, September 5 - 8, 2005
Amsterdam: Elsevier, 2006 (Nuclear instruments and methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment 565.2006,Nr.1)
International Workshop on Semiconductor Pixel Detectors for Particles and Imaging (PIXEL) <3, 2005, Bonn>
Conference Paper, Journal Article
Fraunhofer IZM ()
flip chip technology; high-density packaging; high-yield wafer bumping; electroplating; lead-free solder bump

Flip chip technology is a key driver for new complex system architectures and high-density packaging, e.g. sensor or pixel devices. Bumped wafers/dice as key elements become very important in terms of general availability at low cost, high yield and quality level. Today, different materials, e.g. Au, Ni, AuSn, SnAg, SnAgCu, SnCu, etc., are used for flip chip interconnects and different bumping approaches are available. Electroplating is the technology of choice for high-yield wafer bumping for small bump sizes and pitches. Lead-free solder bumps require an increase in knowledge in the field of under bump metallization (UBM) and the interaction of bump and substrate metallization, the formation and growth of intermetallic compounds (IMCs) during liquid- and solid-phase reactions. Results of a new bi-layer UBM of Ni-Cu which is especially designed for small-sized lead-free solder bumps will be discussed.