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Improving 5V Digital 4H-SiC CMOS ICs for Operating at 400°C Using PMOS Channel Implantation

: Albrecht, M.; Erlbacher, T.; Bauer, A.J.; Frey, L.


Gammon, Peter M.:
Silicon Carbide and Related Materials 2018 : Selected papers from the 12th European Conference on Silicon Carbide and Related Materials (ECSCRM 2018), held in Birmingham, UK, in September 2018
Durnten-Zurich: TTP, 2019 (Materials Science Forum 963)
ISBN: 978-3-0357-1332-9
ISBN: 978-3-0357-2332-8
ISBN: 978-3-0357-3332-7
European Conference on Silicon Carbide and Related Materials (ECSCRM) <12, 2018, Birmingham>
Conference Paper
Fraunhofer IISB ()
p-MOSFET; channel implantation; 5V CMOS Logic; high temperature; 4H-SiC; ICs

In this work, the impact of a shallow aluminum channel implantation on the channel properties of SiC p-MOSFETs and digital SiC CMOS devices is investigated. For this purpose, p-MOSFETs, CMOS inverters and ring oscillators with different channel implantation doses were fabricated and electrically characterized. The threshold voltage of the resulting p-MOSFETs was shifted from -5 V to -3.6 V whereas the effective channel mobility was slightly decreased from 11.8 cm²/Vs to 10.2 cm²/Vs for a p-MOSFET channel implantation dose of 2∙1013 cm-2 compared to the non-implanted channel. The resulting p-MOSFETs enable SiC CMOS logic circuits to operate with a 5 V power supply and to satisfy 5 V TTL input level specification over the whole temperature range of 25°C to 400°C. Furthermore the propagation delay time of inverters was reduced by 80% at 25°C and 40% at 400°C compared to inverters without p-MOSFET channel implantation.