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  4. High Endurance Ferroelectric Hafnium Oxide-Based FeFET Memory Without Retention Penalty
 
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2018
Journal Article
Title

High Endurance Ferroelectric Hafnium Oxide-Based FeFET Memory Without Retention Penalty

Abstract
We report the integration of a ferroelectric (FE) silicon-doped hafnium oxide material in ferroelectric field-effect transistor (FeFET) devices fabricated with an optimized interfacial layer in a gate-first scheme. The effect of increasing the permittivity (k) value of the interface layer on the performance of the metal-ferroelectric-insulator-semiconductor (MFIS)-FE-HfO 2 FeFET is studied in terms of its switching characteristics, endurance, and retention. In contrast to the previous work, the FE Si:HfO 2 -integrated FeFET devices show a low-power operation capability as well as an improved endurance characteristics without jeopardizing high-temperature retention. The utilization of an optimized SiON interface layer for MFIS-HfO 2 FeFET stack is discussed, and the improvements are outlined with reference to a standard low-k SiO 2 interface.
Author(s)
Ali, T.
Polakowski, P.
Riedel, S.
Büttner, T.
Kämpfe, T.
Rudolph, M.
Pätzold, B.
Seidel, K.
Löhr, D.
Hoffmann, R.
Czernohorsky, M.
Kühnel, K.
Steinke, P.
Calvo, J.
Zimmermann, K.
Müller, J.
Journal
IEEE transactions on electron devices  
DOI
10.1109/TED.2018.2856818
Language
English
Fraunhofer-Institut für Photonische Mikrosysteme IPMS  
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