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Towards cube-sized compute nodes: Advanced packaging concepts enabling extreme 3D integration

 
: Brunschwiler, T.; Schlottig, G.; Sridhar, A.; Bezerra, P.; Ruch, P.; Ebejer, N.; Oppermann, H.; Kleff, J.; Steller, W.; Jatlaoui, M.; Voiron, F.; Pavlovic, Z.; McCloskey, P.; Bremner, D.; Parida, P.; Krismer, F.; Kolar, J.; Michel, B.

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Institute of Electrical and Electronics Engineers -IEEE-:
International Electron Devices Meeting, IEDM 2017. Technical digest : 2-6 December 2017, San Francisco, CA, USA
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5386-3559-9
ISBN: 978-1-5386-3558-2
ISBN: 978-1-5386-3560-5
pp.75-78
International Electron Devices Meeting (IEDM) <63, 2017, San Francisco/Calif.>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Novel heat removal and power delivery topologies are required to enable `extreme 3D integration' with cube-sized compute nodes. Therefore, a technology roadmap is presented supporting memory-on-logic and logic-on-logic in the medium and long-term, by (i) dual-side cooling and integrated voltage regulators, and (ii) interlayer cooling and electrochemical power delivery.

: http://publica.fraunhofer.de/documents/N-520501.html