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The Evolution of Panel Level Packaging

 
: Aschenbrenner, R.; Töpper, M.; Braun, T.; Ostmann, A.

:

Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society:
IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018. Proceedings of Technical Papers : Kobe, Japan, March 13-16, 2018
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5386-3712-8
ISBN: 978-1-5386-3711-1
ISBN: 978-1-5386-3713-5
pp.223-226
Electron Devices Technology and Manufacturing Conference (EDTM) <2, 2018, Kobe>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Developing demands and the market show two main trends helping to shape the ongoing development of system integration technologies. First of all is an ongoing increase in the number of functions directly included in a system - such as electrical, optical, mechanical, biological and chemical processes - combined with the demand for higher reliability and longer system lifetime. Second is the increasingly seamless merging of products and electronics, which necessitates adapting electronics to predefined materials, forms and application environments. Only by these means systems sensors - which are often installed in extremely harsh environments - and signal processing can be implemented near to the point where signals are occurring. Large area mold embedding technologies and embedding of active components into printed circuit boards (Chip-in-Polymer) are two major packaging trends in this area. Both technologies are under the frame of Panel Level Packaging research at Fraunhofer I ZM. This paper describes the potential of heterogeneous integration technologies researched at Fraunhofer IZM with a strong focus on embedding in printed circuit boards and embedding in molded reconfigured wafers with an outlook of advanced large area encapsulation processes for multi chip embedding in combination with large area and low cost redistribution technology derived from printed circuit board manufacturing.

: http://publica.fraunhofer.de/documents/N-520250.html