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Wafer level chip size package challenges

 
: Töpper, M.; Reichl, H.

HDI magazine 3 (2000), No.1, pp.14-16
English
Journal Article
Fraunhofer IZM ()

Abstract
The driving forces for new development in semiconductor IC technology are constant reductions in structure size and an increase in the overall electrical performance. The 0.25µm technology has been already introduced into high-volume production and is now heading for 0.18µm technology. A new area of chip production will start with the first wafer fabs doing CMOS on 300-mm (12-in.) wafers beginning 2000.

: http://publica.fraunhofer.de/documents/N-51878.html