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Wafer level embedding technology for packaging of planar GaN half-bridge module in high power density conversion applications

: Manier, Charles-Alix; Klein, Kirill; Wuest, Felix; Gernhardt, Robert; Oppermann, Hermann; Cussac, Philippe; Andzouana, Sophie; Mitova, Radoslava; Lang, Klaus-Dieter

MESAGO PCIM GmbH, Stuttgart:
PCIM Europe 2018, International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management. Proceedings : Nuremberg, 05 - 07 June 2018, CD-ROM
Berlin: VDE-Verlag, 2018
ISBN: 978-3-8007-4646-0
ISBN: 3-8007-4646-8
PCIM Europe <2018, Nuremberg>
Conference Paper
Fraunhofer IZM ()

For the development of GaN-based power solutions, electronic packaging aspects like high temperature capability, low parasitics and low thermal resistance have to be considered for final robust systems. A new fabrication process is here presented for packaging of GaN bare devices in form of silicon-based packages using wafer level back-end processes. Compact planar half-bridge modules were fabricated at 200 mm wafer scale with 650 V rated single GaN bare die. The package demonstrates voltage breakdown up to 650 V with leakage current as low as 250 nA with top-bottom electrical isolation of 1 nA at 2500V. A thermal resistance RthJC of around 0.4 K/W was also characterized. Implementation in power solutions has been first evaluated and first results will be presented in this paper.