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HED-TIE: A wafer-scale approach for fabricating hybrid electronic devices with trench isolated electrodes

 
: Banerjee, S.; Bülz, D.; Solonenko, D.; Reuter, D.; Deibel, C.; Hiller, K.; Zahn, D.R.T.; Salvan, G.

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Nanotechnology 28 (2017), No.19, Art. 195303, 10 pp.
ISSN: 0957-4484
ISSN: 1361-6528
English
Journal Article
Fraunhofer ENAS ()

Abstract
Organic-inorganic hybrid electronic devices (HEDs) offer opportunities for functionalities that are not easily obtainable with either organic or inorganic materials individually. In the strive for down-scaling the channel length in planar geometry HEDs, the best results were achieved with electron beam lithography or nanoimprint lithography. Their application on the wafer level is, however, cost intensive and time consuming. Here, we propose trench isolated electrode (TIE) technology as a fast, cost effective, wafer-level approach for the fabrication of planar HEDs with electrode gaps in the range of 100 nm. We demonstrate that the formation of the organic channel can be realized by deposition from solution as well as by the thermal evaporation of organic molecules. To underline one key feature of planar HED-TIEs, namely full accessibility of the active area of the devices by external stimuli such as light, 6,13-bis (triisopropylsilylethynyl) (TIPS)-pentacene/Au HED-TIEs are successfully tested for possible application as hybrid photodetectors in the visible spectral range.

: http://publica.fraunhofer.de/documents/N-480692.html