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Trench filling with a-Si using a PE-CVD process and back etch sequence

 
: Elsäßer, Linus; Naumann, A.

:
Fulltext urn:nbn:de:0011-n-4771074 (369 KByte PDF)
MD5 Fingerprint: 97d9eef7ddbdd1e6d643dadea3b68ecc
Created on: 20.12.2017


Otto, T. ; Fraunhofer-Institute for Electronic Nano Systems -ENAS-, Chemnitz; Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration -IZM-, Berlin:
Smart Systems Integration 2017 : International Conference and Exhibition on Integration Issues of Miniaturized Systems, 8 - 9 March 2017, Cork, Ireland
Auerbach /Vogtl.: Verlag Wissenschaftliche Scripten, 2017
ISBN: 978-3-95735-057-2
ISBN: 3-95735-057-3
pp.370-373
International Conference and Exhibition on Integration Issues of Miniaturized Systems <2017, Cork>
English
Conference Paper, Electronic Publication
Fraunhofer IPMS ()

Abstract
A trench filling process with amorphous silicon (a-Si) using a PE-CVD process has been developed, which allows to tune the filling behavior at the wafer surface. Appropriate void adjustment has been achieved by using a deposition and back etch sequence on the PE-CVD tool. This trench filling sequence allows to combine a bulk MEMS process (including deep trenches) with a subsequent surface MEMS processing on a flat wafer surface. The whole process is CMOS compatible allowing monolithical integration of bulk and surface MEMS structure on prefabricated CMOS wafers.

: http://publica.fraunhofer.de/documents/N-477107.html