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How to integrate MEMS on foundry-fabricated CMOS backplanes

: Schulze, Matthias; Hohle, Christoph; Friedrichs, Martin


Murota, J. ; Electrochemical Society -ECS-; Electrochemical Society -ECS-, Electronics and Photonics Division:
Semiconductor Process Integration 10 : National Harbor, MD, 232nd Meeting of the Electrochemical Society, October 1-5, 2017
Pennington, NJ: ECS, 2017 (ECS transactions 80.2017, Nr.4)
ISBN: 978-1-62332-473-5
ISBN: 978-1-62332-464-3
ISBN: 978-1-60768-821-1
Symposium on Semiconductor Process Integration <10, 2017, National Harbor/Md.>
Electrochemical Society (ECS Meeting) <232, 2017, National Harbor/Md.>
Conference Paper
Fraunhofer IPMS ()

Due to massive use of sensors and actuators in mobile and industrial applications smaller systems combined with low power consumption and higher versatility are required. As highly integrated and miniaturized devices System-on-chip (SoC) solutions are offering smallest feature sizes. Especially, MEMS-on-CMOS technology is often the choice to serve these demands. In order to reduce the development costs and time-to-market the combination of a standard CMOS processes from foundries with a subsequent MEMS processing is recommended. This technology offers a way to separate CMOS manufacturing and the specific developments of MEMS part. Fraunhofer IPMS employs bulk and surface micromachining for a large variety of MEMS devices e.g. spatial light modulators (SLM) and capacitive micro-machined ultrasonic transducers (CMUT). Based on a CMOS compatible inorganic sacrificial layer technique we will present essential requirements and challenges for the integration of surface micro-machined MEMS on foundry-fabricated CMOS backplanes.