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Optimized design for 4H-SiC power DMOSFETs

Optimiertes Design von 4H-SiC Leistungs-DMOSFETs
 
: Benedetto, Luigi di; Licciardo, Gian D.; Erlbacher, Tobias; Bauer, Anton J.; Rubino, Alfredo

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IEEE Electron Device Letters 37 (2016), No.11, pp.1454-1457
ISSN: 0741-3106
ISSN: 0193-8576
English
Journal Article
Fraunhofer IISB ()
design methodology; Power MOSFET; semiconductor device modeling; silicon compound

Abstract
An optimized tradeoff between blocking voltage and specific ON-resistance for 4H-silicon carbide power vertical double-implanted metal-oxide-semiconductor field-effect transistor (DMOSFET) is exclusively obtained as a function of doping concentration in the drift region. Based on a novel analytical model of the electric field in the gate oxide of 4H-SiC DMOSFETs, we propose a closed-form equation of the Junction FET (JFET) region width and the drift thickness as function of doping concentration without using fitting and empirical parameters to obtain the maximum figure of merit. Model results are successfully verified with TCAD numerical simulations, covering a wide range of device performances, and experimental results.

: http://publica.fraunhofer.de/documents/N-431737.html